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10 Days Internship on VLSI (Very Large Scale Integration)

Improve your technical skill to maximize your chance of Placement (Get High Package)

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🗓 Internship Schedule
Duration: 2 Hours
Dates: 28 March 2026
Session Timings:

7 PM Onwards

What's Included in This Internship

  • Beginner-friendly sessions (no prior experience required). 
  •  Step-by-step guidance from industry professionals.
  •  Live doubt-clearing and Q&A sessions.
  •  Recorded sessions for revision.
  •  Practical exposure to real-world use cases.
  •  Introduction to VSLI.
  • Getting started with Verilog programming. 
  • Design & Implementation of Combinational Circuit using Verilog.
  • Design & Implementation of Sequential Circuit using Verilog.
  • 10 days internship certificate will be provided.

Learn from an Industry Expert

#1.Mangesh Bharati
Technical Trainer & Director – MDB Electrosoft Pvt. Ltd.
With over 20 years of experience across academia and industry, Mangesh Bharati brings deep expertise in Embedded Systems, IoT, PCB Design, Image Processing, Robotics, Drones, and AI.
He is a Board of Studies member at reputed institutions in Amravati and has played a key role in bridging academic learning with real-world industry practices.

Key Highlights

  • 2 Patents granted to him.
  • He filed 1 Patent.
  • Founder & Director of MDB Electrosoft Pvt. Ltd. and experienced Technical Trainer. 
  •  20+ years of combined experience across academia and industry.
  •  Expertise in Embedded Systems, IoT, PCB Design, Robotics, Drones, AI, and Image Processing. 
  •  Board of Studies Member at Government Polytechnic Amravati and Pote Engineering College (EXTC).
  •  Innovation-driven professional with 2 patents granted and 1 patent filed.
  •  Academic & Industry Leadership: 9 years as Assistant Professor and 11 years of industrial experience.
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#2.Dr. Swapnil P. Badar
Ph.D. – Digital VLSI Design Engineer

With 14+ years of experience in academia and industry, Dr. Swapnil Badar specializes in Digital VLSI Design, FPGA Prototyping, and Embedded Systems. He has strong expertise in RTL-to-GDS design flow, 5G hardware architectures, and advanced semiconductor design tools.
He currently works as an Assistant Professor at Shri Sant Gajanan Maharaj College of Engineering, Shegaon, mentoring engineering students and conducting industry-oriented VLSI training programs.

      Key Highlights 

    ✔ 14+ years of academic and research experience
    ✔ Ph.D. in Electronics & Telecommunication Engineering
    ✔ Designed high-speed Polar Code decoders for 5G applications
    ✔ Expertise in Verilog, FPGA, Cadence, and RTL-to-GDS design flow
    ✔ Trained 1000+ engineering students and 50+ faculty members
    ✔ Best Paper Awards in International Conferences & Cadence Design Contest Finalist
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